Bobby R. Bruce has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/49929 )
Change subject: python: Add `has_dma_ports` check to mesi_two_level
......................................................................
python: Add `has_dma_ports` check to mesi_two_level
Previously the MesiTwoLevelCacheHierarchy assumed the board had dma
ports. This change adds a simple check and skips adding the
DMASequencers if the board does not have any.
Change-Id: I64ee68267d16c9d9a6096ba7fd660f04515b2b3c
---
M src/python/gem5/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git
a/src/python/gem5/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
b/src/python/gem5/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
index 228f61c..ca47c04 100644
---
a/src/python/gem5/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
+++
b/src/python/gem5/cachehierarchies/ruby/mesi_two_level_cache_hierarchy.py
@@ -169,13 +169,14 @@
for dir in self._directory_controllers:
dir.ruby_system = self.ruby_system
- dma_ports = board.get_dma_ports()
self._dma_controllers = []
- for i, port in enumerate(dma_ports):
- ctrl = DMAController(self.ruby_system.network, cache_line_size)
- ctrl.dma_sequencer = DMASequencer(version=i, in_ports=port)
- self._dma_controllers.append(ctrl)
- ctrl.ruby_system = self.ruby_system
+ if board.has_dma_ports():
+ dma_ports = board.get_dma_ports()
+ for i, port in enumerate(dma_ports):
+ ctrl = DMAController(self.ruby_system.network,
cache_line_size)
+ ctrl.dma_sequencer = DMASequencer(version=i, in_ports=port)
+ self._dma_controllers.append(ctrl)
+ ctrl.ruby_system = self.ruby_system
self.ruby_system.num_of_sequencers = len(self._l1_controllers) +
len(
self._dma_controllers
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I64ee68267d16c9d9a6096ba7fd660f04515b2b3c
Gerrit-Change-Number: 49929
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce <[email protected]>
Gerrit-MessageType: newchange
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