Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/50255 )
Change subject: misc: Stop including arch/vecregs.hh and fix transitive
includes.
......................................................................
misc: Stop including arch/vecregs.hh and fix transitive includes.
Change-Id: I7854e77517f52b7c19cdb91c67016315391fd87f
---
M src/arch/arm/aapcs32.hh
M src/arch/arm/aapcs64.hh
M src/arch/arm/isa.hh
M src/arch/arm/system.hh
M src/arch/arm/tracers/tarmac_base.hh
M src/cpu/exec_context.hh
M src/cpu/o3/regfile.hh
M src/cpu/o3/rename_map.cc
M src/cpu/o3/thread_context.cc
M src/cpu/simple/exec_context.hh
M src/cpu/simple_thread.hh
M src/cpu/thread_context.hh
M src/sim/insttracer.hh
13 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/arch/arm/aapcs32.hh b/src/arch/arm/aapcs32.hh
index a2d5627..96de7ad 100644
--- a/src/arch/arm/aapcs32.hh
+++ b/src/arch/arm/aapcs32.hh
@@ -34,6 +34,7 @@
#include <utility>
#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/arm/utility.hh"
#include "base/intmath.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh
index 2c709d3..41b9c9d 100644
--- a/src/arch/arm/aapcs64.hh
+++ b/src/arch/arm/aapcs64.hh
@@ -34,6 +34,7 @@
#include <utility>
#include "arch/arm/regs/int.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/arm/utility.hh"
#include "base/intmath.hh"
#include "cpu/thread_context.hh"
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 8fb0526..5710d93 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -45,6 +45,7 @@
#include "arch/arm/mmu.hh"
#include "arch/arm/regs/int.hh"
#include "arch/arm/regs/misc.hh"
+#include "arch/arm/regs/vec.hh"
#include "arch/arm/self_debug.hh"
#include "arch/arm/system.hh"
#include "arch/arm/types.hh"
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index f2ec5c3..4eca2d8 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -45,6 +45,7 @@
#include <string>
#include <vector>
+#include "arch/arm/types.hh"
#include "kern/linux/events.hh"
#include "params/ArmSystem.hh"
#include "sim/full_system.hh"
diff --git a/src/arch/arm/tracers/tarmac_base.hh
b/src/arch/arm/tracers/tarmac_base.hh
index a29eb74..67a5795 100644
--- a/src/arch/arm/tracers/tarmac_base.hh
+++ b/src/arch/arm/tracers/tarmac_base.hh
@@ -49,6 +49,7 @@
#ifndef __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
#define __ARCH_ARM_TRACERS_TARMAC_BASE_HH__
+#include "arch/arm/types.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 361ee02..04460cd 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -42,7 +42,6 @@
#ifndef __CPU_EXEC_CONTEXT_HH__
#define __CPU_EXEC_CONTEXT_HH__
-#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index ae794e5..0613708 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -46,7 +46,6 @@
#include <vector>
#include "arch/generic/isa.hh"
-#include "arch/vecregs.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index 4682357..b2c8571 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -43,7 +43,6 @@
#include <vector>
-#include "arch/vecregs.hh"
#include "cpu/o3/dyn_inst.hh"
#include "cpu/reg_class.hh"
#include "debug/Rename.hh"
diff --git a/src/cpu/o3/thread_context.cc b/src/cpu/o3/thread_context.cc
index b853b11..36dff1e 100644
--- a/src/cpu/o3/thread_context.cc
+++ b/src/cpu/o3/thread_context.cc
@@ -41,7 +41,6 @@
#include "cpu/o3/thread_context.hh"
-#include "arch/vecregs.hh"
#include "config/the_isa.hh"
#include "debug/O3CPU.hh"
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index f810292..eff66f4 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -41,7 +41,6 @@
#ifndef __CPU_SIMPLE_EXEC_CONTEXT_HH__
#define __CPU_SIMPLE_EXEC_CONTEXT_HH__
-#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index f584992..a6b61b6 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -51,7 +51,6 @@
#include "arch/generic/tlb.hh"
#include "arch/isa.hh"
#include "arch/pcstate.hh"
-#include "arch/vecregs.hh"
#include "base/logging.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index ba1aaaf..5a7fed0 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -48,7 +48,6 @@
#include "arch/generic/htm.hh"
#include "arch/generic/isa.hh"
#include "arch/pcstate.hh"
-#include "arch/vecregs.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/pc_event.hh"
diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh
index 0cf1b3b..7b98e4d 100644
--- a/src/sim/insttracer.hh
+++ b/src/sim/insttracer.hh
@@ -41,7 +41,6 @@
#ifndef __INSTRECORD_HH__
#define __INSTRECORD_HH__
-#include "arch/vecregs.hh"
#include "base/types.hh"
#include "cpu/inst_res.hh"
#include "cpu/inst_seq.hh"
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7854e77517f52b7c19cdb91c67016315391fd87f
Gerrit-Change-Number: 50255
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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