[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Use std::abs in riscv to avoid a warning.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/52029 )

Change subject: arch-riscv: Use std::abs in riscv to avoid a warning.
......................................................................

arch-riscv: Use std::abs in riscv to avoid a warning.

gcc complains that regular abs returns an int and may truncate its
result. The warning suggests using std::abs instead, which is
polymorphic and will have a version which returns an appropriately sized
type.

Change-Id: I35de92477273b415ce6993cf0cda7dee04985ef9
---
M src/arch/riscv/isa/decoder.isa
1 file changed, 20 insertions(+), 6 deletions(-)



diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index 823698c..f30ecdf 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -693,10 +693,10 @@
                     0x1: mulh({{
                         bool negate = (Rs1_sd < 0) != (Rs2_sd < 0);

-                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
-                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
-                        uint64_t Rs2_lo = (uint32_t)abs(Rs2_sd);
-                        uint64_t Rs2_hi = (uint64_t)abs(Rs2_sd) >> 32;
+                        uint64_t Rs1_lo = (uint32_t)std::abs(Rs1_sd);
+                        uint64_t Rs1_hi = (uint64_t)std::abs(Rs1_sd) >> 32;
+                        uint64_t Rs2_lo = (uint32_t)std::abs(Rs2_sd);
+                        uint64_t Rs2_hi = (uint64_t)std::abs(Rs2_sd) >> 32;

                         uint64_t hi = Rs1_hi*Rs2_hi;
                         uint64_t mid1 = Rs1_hi*Rs2_lo;
@@ -719,8 +719,8 @@
                     }});
                     0x1: mulhsu({{
                         bool negate = Rs1_sd < 0;
-                        uint64_t Rs1_lo = (uint32_t)abs(Rs1_sd);
-                        uint64_t Rs1_hi = (uint64_t)abs(Rs1_sd) >> 32;
+                        uint64_t Rs1_lo = (uint32_t)std::abs(Rs1_sd);
+                        uint64_t Rs1_hi = (uint64_t)std::abs(Rs1_sd) >> 32;
                         uint64_t Rs2_lo = (uint32_t)Rs2;
                         uint64_t Rs2_hi = Rs2 >> 32;


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I35de92477273b415ce6993cf0cda7dee04985ef9
Gerrit-Change-Number: 52029
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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