Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/52061 )

 (

14 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: cpu: Eliminate the ThreadContext::microPC method.
......................................................................

cpu: Eliminate the ThreadContext::microPC method.

This was originally intended to make it more efficient to get the
microPC without making a copy of the entire PCState object to return.
Now that the PCState is returned through a pointer without a copy and
the microPC can be accessed with an inline accessor, we don't need to
create a special accessor for it.

Change-Id: I1d354dfca6be5d954e147f23dc9d27917b379bf2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52061
Tested-by: kokoro <[email protected]>
Reviewed-by: Daniel Carvalho <[email protected]>
Maintainer: Gabe Black <[email protected]>
---
M src/cpu/simple_thread.hh
M src/cpu/checker/cpu.hh
M src/cpu/o3/thread_context.hh
M src/cpu/o3/dyn_inst.cc
M src/cpu/o3/dyn_inst.hh
M src/cpu/thread_context.hh
M src/cpu/o3/cpu.cc
M src/cpu/o3/cpu.hh
M src/cpu/simple/timing.cc
M src/cpu/simple/timing.hh
M src/cpu/o3/commit.hh
M src/cpu/checker/thread_context.hh
M src/cpu/simple/atomic.hh
M src/arch/arm/fastmodel/iris/thread_context.hh
14 files changed, 23 insertions(+), 37 deletions(-)

Approvals:
  Daniel Carvalho: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh
index a343658..620302f 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -348,7 +348,6 @@
     }

     void pcStateNoRecord(const PCStateBase &val) override { pcState(val); }
-    MicroPC microPC() const override { return 0; }

     const PCStateBase &pcState() const override;
     void pcState(const PCStateBase &val) override;
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 3d29d05..37b19aa 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -367,7 +367,6 @@
         thread->pcState(val);
     }
     Addr instAddr() { return thread->instAddr(); }
-    MicroPC microPC() { return thread->microPC(); }
     //////////////////////////////////////////

     RegVal
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index dfc9524..81c4973 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -343,9 +343,6 @@
     /** Reads this thread's PC. */
     Addr instAddr() const override { return actualTC->instAddr(); }

-    /** Reads this thread's next PC. */
-    MicroPC microPC() const override { return actualTC->microPC(); }
-
     RegVal
     readMiscRegNoEffect(RegIndex misc_reg) const override
     {
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index ed462e0..4a3b335 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -314,9 +314,6 @@
     /** Returns the PC of a specific thread. */
     Addr instAddr(ThreadID tid) { return pc[tid]->instAddr(); }

-    /** Reads the micro PC of a specific thread. */
-    Addr microPC(ThreadID tid) { return pc[tid]->microPC(); }
-
   private:
     /** Time buffer interface. */
     TimeBuffer<TimeStruct> *timeBuffer;
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 462c029..6e88a28 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1325,12 +1325,6 @@
     return commit.instAddr(tid);
 }

-MicroPC
-CPU::microPC(ThreadID tid)
-{
-    return commit.microPC(tid);
-}
-
 void
 CPU::squashFromTC(ThreadID tid)
 {
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index e7dd065..46dbefc 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -393,9 +393,6 @@
     /** Reads the commit PC of a specific thread. */
     Addr instAddr(ThreadID tid);

-    /** Reads the commit micro PC of a specific thread. */
-    MicroPC microPC(ThreadID tid);
-
     /** Initiates a squash of all in-flight instructions for a given
      * thread.  The source of the squash is an external update of
      * state through the TC.
diff --git a/src/cpu/o3/dyn_inst.cc b/src/cpu/o3/dyn_inst.cc
index 36591ae..89a7594 100644
--- a/src/cpu/o3/dyn_inst.cc
+++ b/src/cpu/o3/dyn_inst.cc
@@ -219,7 +219,7 @@
DPRINTFR(O3PipeView, "O3PipeView:fetch:%llu:0x%08llx:%d:%llu:%s\n",
                      fetch,
                      instAddr(),
-                     microPC(),
+                     pcState().microPC(),
                      seqNum,
                      staticInst->disassemble(instAddr()));

diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 832d5e8..7ffb779 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -518,9 +518,6 @@
     /** Returns the predicted PC immediately after the branch. */
     Addr predInstAddr() { return predPC->instAddr(); }

-    /** Returns the predicted micro PC after the branch */
-    Addr predMicroPC() { return predPC->microPC(); }
-
     /** Returns whether the instruction was predicted taken or not. */
     bool readPredTaken() { return instFlags[PredTaken]; }

@@ -910,9 +907,6 @@
     /** Read the PC of this instruction. */
     Addr instAddr() const { return pc->instAddr(); }

-    /**Read the micro PC of this instruction. */
-    Addr microPC() const { return pc->microPC(); }
-
     bool readPredicate() const override { return instFlags[Predicate]; }

     void
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index c50371e..ea3ed74 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -295,13 +295,6 @@
         return cpu->instAddr(thread->threadId());
     }

-    /** Reads this thread's next PC. */
-    MicroPC
-    microPC() const override
-    {
-        return cpu->microPC(thread->threadId());
-    }
-
     /** Reads a miscellaneous register. */
     RegVal
     readMiscRegNoEffect(RegIndex misc_reg) const override
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 3eb24fa..aacd0dc 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -92,7 +92,7 @@
     isCpuDrained() const
     {
         SimpleExecContext &t_info = *threadInfo[curThread];
-        return t_info.thread->microPC() == 0 &&
+        return t_info.thread->pcState().microPC() == 0 &&
             !locked && !t_info.stayAtPC;
     }

diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 9f1ce4a..82e4cc8 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -180,7 +180,7 @@
     assert(!fetchEvent.scheduled());
     assert(_status == BaseSimpleCPU::Running || _status == Idle);
     assert(!t_info.stayAtPC);
-    assert(thread->microPC() == 0);
+    assert(thread->pcState().microPC() == 0);

     updateCycleCounts();
     updateCycleCounters(BaseCPU::CPU_STATE_ON);
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 5a21c0e..b2cc4e7 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -363,7 +363,7 @@
         SimpleExecContext& t_info = *threadInfo[curThread];
         SimpleThread* thread = t_info.thread;

-        return thread->microPC() == 0 && !t_info.stayAtPC &&
+        return thread->pcState().microPC() == 0 && !t_info.stayAtPC &&
                !fetchEvent.scheduled();
     }

diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 31e02f7..ac13d15 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -430,7 +430,6 @@
     }

     Addr instAddr() const override  { return _pcState->instAddr(); }
-    MicroPC microPC() const override { return _pcState->microPC(); }
     bool readPredicate() const { return predicate; }
     void setPredicate(bool val) { predicate = val; }

diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 07eb7bb..979f70c 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -237,8 +237,6 @@

     virtual Addr instAddr() const = 0;

-    virtual MicroPC microPC() const = 0;
-
     virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const = 0;

     virtual RegVal readMiscReg(RegIndex misc_reg) = 0;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1d354dfca6be5d954e147f23dc9d27917b379bf2
Gerrit-Change-Number: 52061
Gerrit-PatchSet: 16
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Earl Ou <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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