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FS#264 - Make SPARC translation use the actual tlb User who did this: - Ali Saidi (saidi) Attached to Project - M5 Bugs Summary - Make SPARC translation use the actual tlb Task Type - Bug Category - ISA Support Status - New Assigned To - Gabe Black Operating System - All Severity - Low Priority - Normal Reported Version - 1.1 Due in Version - 2.1 Due Date - Undecided Percent Complete - 90% Details - Make SPARC address translation use the actual TLB. This is not only a problem for regular memory instructions, which can be corrected at the instruction level, but is also a problem for syscalls. In order to get correct functionality, the real TLB needs to be used. SPARC uses the actual TLB now, but it does not yet support setting special properties for any given page which was why it was needed in the first place. More information can be found at the following URL: http://www.m5sim.org/flyspray/task/264 You are receiving this message because you have requested it from the Flyspray bugtracking system. You can be removed from future notifications by visiting the URL shown above. _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
