Instead of plowing ahead with interrupts and all that stuff while I don't have a lot of time to focus on it and the repository is in flux, I've been going back over the part of the simulation that executes already and cleaning up stuff I ignored at first. One thing is that the kernel is convinced there's no PCI, and I've traced it back to it not being able to verify how the PCI buses are set up. There is the following comment:
/* * Before we decide to use direct hardware access mechanisms, we try to do some * trivial checks to ensure it at least _seems_ to be working -- we just test * whether bus 00 contains a host bridge (this is similar to checking * techniques used in XFree86, but ours should be more reliable since we * attempt to make use of direct access hints provided by the PCI BIOS). * * This should be close to trivial, but it isn't, because there are buggy * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID. */ So as it says, it's checking bus 0 device 0 for a host bridge. Do we have a way to set that up? I can short circuit that by filling in one of the tables from the BIOS a little more, but if this is something I'm going to need to do anyway I'd rather do that. Gabe _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
