Looking at this code it seems like the easiest thing is to make sure
that dmi_get_year(DMI_BIOS_DATE) >= 2001.Do you have a DMI table? If
you set the BIOS date > 2001 the function could be skipped. It's just
checking if it some device exists that makes it think this is actually
PCI that it's reading and it's not off in the weeds.
I don't particularly like the idea of faking a host bridge or a VGA
adapter, because at some point Linux is going to come back and try to
configure those devices you attempted to Fake. Since we don't really
care to have a host bridge or a VGA adapter at this point that seems
like a waste of time. While it's likely that we will have something
that Intel makes I don't think we want to make it have to be bus 0, id
0 for this to work.
So in summary:
1. Update the DMI table so the bios date is > 2001.
2. If that fails it's pretty safe to use a M5 SkipFuncEvent to just
skip the function.
Ali
On Jun 13, 2008, at 3:32 AM, Gabe Black wrote:
> The code following the comment in my original email is below.
> Basically,
> it looks like the kernel reads some registers out of the config
> space of
> bus 0 dev 0 function 0-0x100 and sees if they match certain values.
> I'd
> imagine that wouldn't be very hard to do but I don't have any
> experience
> with the PCI stuff. Is there something I can look at as an example?
> How
> do I put something at a particular bus/dev/function?
>
> Gabe
>
> static int __init pci_sanity_check(struct pci_raw_ops *o)
> {
> u32 x = 0;
> int devfn;
>
> if (pci_probe & PCI_NO_CHECKS)
> return 1;
> /* Assume Type 1 works for newer systems.
> This handles machines that don't have anything on PCI Bus 0. */
> if (dmi_get_year(DMI_BIOS_DATE) >= 2001)
> return 1;
>
> for (devfn = 0; devfn < 0x100; devfn++) {
> if (o->read(0, 0, devfn, PCI_CLASS_DEVICE, 2, &x))
> continue;
> if (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)
> return 1;
>
> if (o->read(0, 0, devfn, PCI_VENDOR_ID, 2, &x))
> continue;
> if (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)
> return 1;
> }
>
> DBG(KERN_WARNING "PCI: Sanity check failed\n");
> return 0;
> }
>
>
> nathan binkert wrote:
>>> So this would be the PCI bus support in the north bridge for
>>> instance?
>>> Should I just arbitrarily pick a chipset and implement that, or is
>>> there
>>> something more generic?
>>
>> I think that there's really only one interface for this that really
>> matters. On alpha, there were lots of north bridge interfaces, but
>> on
>> x86, they still basically use the same one. Some chipsets have
>> extensions (for secondary bridges and such), but we don't need to use
>> those.
>>
>> I agree with Ali on the look at the kernel part.
>>
>> Nate
>> _______________________________________________
>> m5-dev mailing list
>> m5-dev@m5sim.org
>> http://m5sim.org/mailman/listinfo/m5-dev
>
> _______________________________________________
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> m5-dev@m5sim.org
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>
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