The code following the comment in my original email is below. Basically,
it looks like the kernel reads some registers out of the config space of
bus 0 dev 0 function 0-0x100 and sees if they match certain values. I'd
imagine that wouldn't be very hard to do but I don't have any experience
with the PCI stuff. Is there something I can look at as an example? How
do I put something at a particular bus/dev/function?
Gabe
static int __init pci_sanity_check(struct pci_raw_ops *o)
{
u32 x = 0;
int devfn;
if (pci_probe & PCI_NO_CHECKS)
return 1;
/* Assume Type 1 works for newer systems.
This handles machines that don't have anything on PCI Bus 0. */
if (dmi_get_year(DMI_BIOS_DATE) >= 2001)
return 1;
for (devfn = 0; devfn < 0x100; devfn++) {
if (o->read(0, 0, devfn, PCI_CLASS_DEVICE, 2, &x))
continue;
if (x == PCI_CLASS_BRIDGE_HOST || x == PCI_CLASS_DISPLAY_VGA)
return 1;
if (o->read(0, 0, devfn, PCI_VENDOR_ID, 2, &x))
continue;
if (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)
return 1;
}
DBG(KERN_WARNING "PCI: Sanity check failed\n");
return 0;
}
nathan binkert wrote:
>> So this would be the PCI bus support in the north bridge for instance?
>> Should I just arbitrarily pick a chipset and implement that, or is there
>> something more generic?
>
> I think that there's really only one interface for this that really
> matters. On alpha, there were lots of north bridge interfaces, but on
> x86, they still basically use the same one. Some chipsets have
> extensions (for secondary bridges and such), but we don't need to use
> those.
>
> I agree with Ali on the look at the kernel part.
>
> Nate
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