The file I'm referring to is arch/alpha/tlb.cc and specifically the translateAtomic() function implemented there.
Basically, having the "Read" mode is irrelevant there since it's given a default type of "write" when it calls translateData(). Then in the translateData() function it goes ahead and gets the mode from a system register. So either I'm mixing up what "mode" means or that extra mode (at least for translateAtomic()) is just extra there. On Thu, Apr 9, 2009 at 11:59 AM, nathan binkert <[email protected]> wrote: > > can someone elaborate on what the 3 modes mean {Read, Write, Execute}? > They correspond to the access types that come from the CPU. > > > I ask because in the translateAtomic function it seems as if the only > modes > > that matter are Write and Execute. Why does Read not matter? > It does. Which translateAtomic function do you think it doesn't matter > for? > > > I might be missing something simple, but it seems as if there are only 2 > > necessary modes (Inst/Data) and for the data portion we read the alpha > > system register to figure out if it's a read/write access. > You don't read a register to find out if its a read or a write, the > instruction itself tells you that. > > > Thus, the 3rd argument to that function looks unnecessary since it is > always > > the value "Write". If it is unneccessary, then does that not mess up the > > stats in that function who play off the "write" variable instead of maybe > > more appropriately the "mode" variable? > Which file exactly are you liking in. There are multiple > implementations of this function. > > > Again, I might just be overlooking something. Can someone give me some > > insight into what's going on here? > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > -- ---------- Korey L Sewell Graduate Student - PhD Candidate Computer Science & Engineering University of Michigan
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