changeset 29c1cc8075e4 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=29c1cc8075e4
description:
        ARM: Get rid of unused postacc_code.

diffstat:

2 files changed, 3 insertions(+), 23 deletions(-)
src/arch/arm/isa/formats/mem.isa  |   20 --------------------
src/arch/arm/isa/formats/util.isa |    6 +++---

diffs (85 lines):

diff -r ceb4c8a5e7a2 -r 29c1cc8075e4 src/arch/arm/isa/formats/mem.isa
--- a/src/arch/arm/isa/formats/mem.isa  Fri Jun 12 21:19:16 2009 -0700
+++ b/src/arch/arm/isa/formats/mem.isa  Sun Jun 21 09:16:55 2009 -0700
@@ -358,20 +358,12 @@
             EA = xc->getEA();
 
             if (fault == NoFault) {
-                %(postacc_code)s;
-            }
-
-            if (fault == NoFault) {
                 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
                                   memAccessFlags, NULL);
                 if (traceData) { traceData->setData(Mem); }
             }
 
             if (fault == NoFault) {
-                %(postacc_code)s;
-            }
-
-            if (fault == NoFault) {
                 %(op_wb)s;
             }
         }
@@ -406,10 +398,6 @@
             }
 
             if (fault == NoFault) {
-                %(postacc_code)s;
-            }
-
-            if (fault == NoFault) {
                 %(op_wb)s;
             }
         }
@@ -466,10 +454,6 @@
         if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode))
         {
             if (fault == NoFault) {
-                %(postacc_code)s;
-            }
-
-            if (fault == NoFault) {
                 %(op_wb)s;
             }
         }
@@ -491,10 +475,6 @@
         if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode))
         {
             if (fault == NoFault) {
-                %(postacc_code)s;
-            }
-
-            if (fault == NoFault) {
                 %(op_wb)s;
             }
         }
diff -r ceb4c8a5e7a2 -r 29c1cc8075e4 src/arch/arm/isa/formats/util.isa
--- a/src/arch/arm/isa/formats/util.isa Fri Jun 12 21:19:16 2009 -0700
+++ b/src/arch/arm/isa/formats/util.isa Sun Jun 21 09:16:55 2009 -0700
@@ -39,7 +39,7 @@
     return new_code
 
 def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
-                  postacc_code = '', base_class = 'Memory',
+                  base_class = 'Memory',
                   decode_template = BasicDecode, exec_template_base = ''):
     # Make sure flags are in lists (convert to lists if not).
     mem_flags = makeList(mem_flags)
@@ -58,13 +58,13 @@
     # they differ only in the set of code objects contained (which in
     # turn affects the object's overall operand list).
     iop = InstObjParams(name, Name, base_class,
-                        { 'ea_code':ea_code, 'memacc_code':memacc_code, 
'postacc_code':postacc_code },
+                        { 'ea_code':ea_code, 'memacc_code':memacc_code},
                         inst_flags)
     ea_iop = InstObjParams(name, Name, base_class,
                         { 'ea_code':ea_code },
                         inst_flags)
     memacc_iop = InstObjParams(name, Name, base_class,
-                        { 'memacc_code':memacc_code, 
'postacc_code':postacc_code },
+                        { 'memacc_code':memacc_code},
                         inst_flags)
 
     if mem_flags:
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