changeset 71dd4e07e626 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=71dd4e07e626
description:
ARM: Link register is trashed by non-executed branch and link
operations.
diffstat:
2 files changed, 10 insertions(+), 2 deletions(-)
src/arch/arm/isa/decoder.isa | 4 ++--
src/arch/arm/isa/formats/branch.isa | 8 ++++++++
diffs (64 lines):
diff -r dadfc8d8b6dd -r 71dd4e07e626 src/arch/arm/isa/decoder.isa
--- a/src/arch/arm/isa/decoder.isa Tue Jun 23 23:23:25 2009 -0700
+++ b/src/arch/arm/isa/decoder.isa Wed Jun 24 21:22:46 2009 -0700
@@ -246,7 +246,7 @@
}});
}
0x3: decode OPCODE_24_21 {
- 0x9: BranchExchange::blx({{ LR = NPC; }});
+ 0x9: BranchExchange::blx({{ }}, Link);
}
}
}
@@ -661,7 +661,7 @@
0x5: decode OPCODE_24 {
// Branch (and Link) Instructions
0: Branch::b({{ }});
- 1: Branch::bl({{ LR = NPC; }});
+ 1: Branch::bl({{ }}, Link);
}
0x6: decode CPNUM {
0x1: decode PUNWL {
diff -r dadfc8d8b6dd -r 71dd4e07e626 src/arch/arm/isa/formats/branch.isa
--- a/src/arch/arm/isa/formats/branch.isa Tue Jun 23 23:23:25 2009 -0700
+++ b/src/arch/arm/isa/formats/branch.isa Wed Jun 24 21:22:46 2009 -0700
@@ -38,8 +38,10 @@
#Build Instruction Flags
#Use Link & Likely Flags to Add Link/Condition Code
inst_flags = ('IsDirectControl', )
+ linking = False
for x in opt_flags:
if x == 'Link':
+ linking = True
code += 'LR = NPC;\n'
else:
inst_flags += (x, )
@@ -55,6 +57,8 @@
icode += ' NPC = NPC + 4 + disp;\n'
icode += '} else {\n'
icode += ' NPC = NPC;\n'
+ if linking:
+ icode += ' LR = LR;\n'
icode += '};\n'
code = icode
@@ -70,8 +74,10 @@
#Build Instruction Flags
#Use Link & Likely Flags to Add Link/Condition Code
inst_flags = ('IsIndirectControl', )
+ linking = False
for x in opt_flags:
if x == 'Link':
+ linking = True
code += 'LR = NPC;\n'
else:
inst_flags += (x, )
@@ -89,6 +95,8 @@
icode += ' NPC = Rm & 0xfffffffe; // Masks off bottom bit\n'
icode += '} else {\n'
icode += ' NPC = NPC;\n'
+ if linking:
+ icode += ' LR = LR;\n'
icode += '};\n'
code = icode
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