Gabriel Michael Black wrote: > Quoting Steve Reinhardt <[email protected]>: > > >> On Tue, Jun 30, 2009 at 3:24 PM, Gabriel Michael Black < >> [email protected]> wrote: >> >> >>> This is fine, except it doesn't really address the op_rd and op_wb >>> issue, ie. having different code to read and write the register >>> arguments in the execute method. I'd like to have that fixed as soon >>> since it's holding up some other register file work I'm doing. It's >>> not critical that that gets done by any particular time, but I'd >>> rather not have it bit rot on the vine. >>> >> I thought what you had proposed earlier (substituting the more complex >> conditional expression for the simple reg file access) looked good... was >> there an outstanding problem with that approach that still needs discussion? >> >> Steve >> >> > > I though there was, but I might have missed something? We didn't seem > to decide on how the isa_parser would be directed to generate that > code in the right places. Unfortunately there are little parts of it, > specifically the operand index at least, that generic code/the > formats/etc. wouldn't know without paralleling the parser's logic, so > without duplicating code it looks like the isa_parser will need to > play an active role for those little chunks. I have a good idea what I > want the code to be, I'm just not sure how to get it where it needs to > go. > > Gabe > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev >
I'm going to add optional read/write code snippets to the operand definitions unless anyone says otherwise. Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
