> The changes I pushed already mostly fix condition codes on existing > instructions, plus rotates by more than the width of the target, plus > a few minor fixes to multiply related microops. Moving forward in the > short term, division instructions aren't getting the answers they > should, and the test has a form of shift that shift one register out > while shifting another one in that I don't have implemented. After > that, I'm going to need to figure out how I want the various forms of > FP instructions to work, aka microcoded or not, if so broken down how, > how the register management will work, etc. Then I'd need to go in and > implement a bunch of instructions. After that, there are sections of > the test I commented out because I either suspect or know they won't > work currently, perhaps because I'm using SE mode. I'd like to look at > those more carefully and turn on the ones that are useful. There will > potentially be things in there that are broken, and also things that > are just incomplete or missing entirely.
I'd like to point out to people that use m5 that this sounds like a point where some assistance on x86 could really accelerate things. While there will be some hard problems to solve I'm sure, I believe that people could help out in fleshing out the instruction set without a huge learning curve. Nate _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
