Thank you for your patches. I'm a little buried right now, but they are important, I -will- get to them eventually, and they'll more than likely end up in the tree. Thanks!
Gabe Quoting Vince Weaver <[email protected]>: > Hello > > the "loop" instructions on x86 are broken, they seem to be using a > 16-bit immediate for the offset instead of the proper signed 8-bit one. > This very obviously breaks instructions trying to loop backward. > > The patch below fixes things on my regression test, though I might have > something wrong (the uop routines are a bit hard to follow). Also the > other two LOOP variations probably need the fix too. > > This allows the x86 version of my regression test run properly > ( http://deater.net/weave/vmwprod/asm/ll/qemu_tests.html ) > > Vince > > diff -r 3b2d7fdff6b1 > src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py > --- > a/src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py Fri Sep > 11 > 16:19:31 2009 -0500 > +++ > b/src/arch/x86/isa/insts/general_purpose/control_transfer/loop.py Mon Sep > 14 > 22:51:52 2009 -0400 > @@ -56,8 +56,9 @@ > microcode = ''' > def macroop LOOP_I { > rdip t1 > + limm t2, imm, dataSize=8 > subi rcx, rcx, 1, flags=(EZF,), dataSize=asz > - wripi t1, imm, flags=(nCEZF,) > + wrip t1, t2, flags=(nCEZF,) > }; > > def macroop LOOPNE_I { > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
