Quoting Vince Weaver <[email protected]>: > On Tue, 15 Sep 2009, Gabriel Michael Black wrote: > >> Never mind. I realized what was going on as I was getting ready for >> work this morning. imm is the same size for all microops, but when >> it's stored internal to the microop it gets truncated into a 16 bit >> immediate value. A better solution might be to make the wripi >> instruction sign extend its immediate since a signed displacement >> sounds like it would be a lot more common. If you'd like to give that >> a try, the code you want is in regop.isa. I'll try that this evening >> if I have time. If that works for you please let me know. > > Is there some documentation that describes the process for uop generation? > I can't find anything useful on the wiki, and I can't seem to track > backwards to find exactly where the immediate value for wripi is being > generated. > > The regop.isa file you mention only has this: > > class Wrip(WrRegOp, CondRegOp): > code = 'RIP = psrc1 + sop2 + CSBase' > else_code="RIP = RIP;" > > Which I must admit isn't that helpful. Part of the problem is I don't > know python very well, and C++ isn't a strong point either. > > Vince > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev >
There was a little at one point or another, but the process is pretty complex and it wasn't ever very fully documented. There's microcode syntax wrapping python sometimes wrapping C++ processed by python running inside the ISA parser to generate C++, and there's a decent amount of complexity at each level, partially due to the nature of x86 and partially due to how M5 is set up. I'll give it a shot when I get home, and if it works out I'll send you a patch to try. Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
