Me to.

Gabe

Steve Reinhardt wrote:
> Looks fine to me.
>
> Steve
>
> On Tue, Aug 24, 2010 at 8:12 PM, Ali Saidi <[email protected]> wrote:
>   
>> Everyone ok with this?
>>
>> Thanks,
>> Ali
>>
>> On Aug 24, 2010, at 5:24 PM, Ali Saidi wrote:
>>
>>     
>>> The previous change caused o3 boot on Alpha/Linux to fail since the max
>>> deptag wasn't Ctrl_DepTag + NumMiscRegs but rather needed to also know
>>> about the internal processor registers. I think it's good to keep this
>>> panic if we are indexing into bogus space, so I've added a Max_DepTag field
>>> to every architecture that is set appropriately.
>>>
>>> Ali
>>>
>>>
>>> On Tue, 24 Aug 2010 22:27:07 -0000, "Ali Saidi" <[email protected]> wrote:
>>>       
>>>> -----------------------------------------------------------
>>>> This is an automatically generated e-mail. To reply, visit:
>>>> http://reviews.m5sim.org/r/227/
>>>> -----------------------------------------------------------
>>>>
>>>> (Updated 2010-08-24 15:27:07.851020)
>>>>
>>>>
>>>> Review request for Default.
>>>>
>>>>
>>>> Summary
>>>> -------
>>>>
>>>> ARM: fixed a bug in the arm register flattening logic (FP_Base_DepTag
>>>>         
>>> was
>>>       
>>>> set too low)
>>>> when decoding a srs instruction, invalid mode encoding returns invalid
>>>> instruction.
>>>> this can happen when garbage instructions are fetched from mispredicted
>>>> path
>>>>
>>>>
>>>> Diffs (updated)
>>>> -----
>>>>
>>>>  src/arch/alpha/registers.hh 47d9409b2b7f
>>>>  src/arch/arm/registers.hh 47d9409b2b7f
>>>>  src/arch/mips/registers.hh 47d9409b2b7f
>>>>  src/arch/power/registers.hh 47d9409b2b7f
>>>>  src/arch/sparc/registers.hh 47d9409b2b7f
>>>>  src/arch/x86/registers.hh 47d9409b2b7f
>>>>  src/cpu/o3/rename_impl.hh 47d9409b2b7f
>>>>
>>>> Diff: http://reviews.m5sim.org/r/227/diff
>>>>
>>>>
>>>> Testing
>>>> -------
>>>>
>>>>
>>>> Thanks,
>>>>
>>>> Ali
>>>>
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