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src/arch/arm/faults.cc <http://reviews.m5sim.org/r/256/#comment497> This looks a bug fix that's unrelated to prefetching and should go in a separate patch. src/cpu/simple/timing.cc <http://reviews.m5sim.org/r/256/#comment498> yea, I don't get this either src/cpu/simple/timing.cc <http://reviews.m5sim.org/r/256/#comment499> I agree, prefetches should just never set fault to anything other than NoFault. src/cpu/simple/timing.cc <http://reviews.m5sim.org/r/256/#comment500> So what happens with Alpha now? Does this cause an error? I think we discussed this but I forgot the upshot. Seems like the Alpha prefetches should at least get a warn_once() or something. src/cpu/simple/timing.cc <http://reviews.m5sim.org/r/256/#comment501> yea, again, if prefetches never set fault then this would not be necessary - Steve On 2010-10-02 19:19:53, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/256/ > ----------------------------------------------------------- > > (Updated 2010-10-02 19:19:53) > > > Review request for Default. > > > Summary > ------- > > ARM: Mark prefetches as such and allow timing CPU to handle them. > > > Diffs > ----- > > src/arch/arm/faults.cc e78b6bba67ca > src/arch/arm/isa/insts/ldr.isa e78b6bba67ca > src/cpu/simple/timing.cc e78b6bba67ca > > Diff: http://reviews.m5sim.org/r/256/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
