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src/cpu/simple/timing.cc <http://reviews.m5sim.org/r/256/#comment495> I'll check it out. - Ali On 2010-10-02 19:19:53, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/256/ > ----------------------------------------------------------- > > (Updated 2010-10-02 19:19:53) > > > Review request for Default. > > > Summary > ------- > > ARM: Mark prefetches as such and allow timing CPU to handle them. > > > Diffs > ----- > > src/arch/arm/faults.cc e78b6bba67ca > src/arch/arm/isa/insts/ldr.isa e78b6bba67ca > src/cpu/simple/timing.cc e78b6bba67ca > > Diff: http://reviews.m5sim.org/r/256/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
