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(Updated 2010-10-24 08:59:56.664764) Review request for Default and Ruby Reviewers. Changes ------- I have made almost all the changes suggested below or on the m5-dev mailing list. Summary ------- Ruby currently uses GEMS debug support with the enum character string map to enable certain debug messages. Meanwhile, M5 has debug print support that works with scons. Compiling the m5.fast binary, the M5 debug statements are removed, but the Ruby ones are not unless RUBY_DEBUG is not defined. This patch moves Ruby to M5's debug print support. Diffs (updated) ----- src/cpu/testers/rubytest/CheckTable.cc f166f8bd8818 src/mem/SConscript f166f8bd8818 src/mem/protocol/MESI_CMP_directory-L1cache.sm f166f8bd8818 src/mem/protocol/MESI_CMP_directory-L2cache.sm f166f8bd8818 src/mem/protocol/MESI_CMP_directory-dir.sm f166f8bd8818 src/mem/protocol/MI_example-cache.sm f166f8bd8818 src/mem/protocol/MI_example-dir.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_directory-L1cache.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_directory-L2cache.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_directory-dir.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_directory-perfectDir.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_token-L1cache.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_token-L2cache.sm f166f8bd8818 src/mem/protocol/MOESI_CMP_token-dir.sm f166f8bd8818 src/mem/protocol/MOESI_hammer-cache.sm f166f8bd8818 src/mem/protocol/MOESI_hammer-dir.sm f166f8bd8818 src/mem/ruby/SConsopts f166f8bd8818 src/mem/ruby/buffers/MessageBuffer.cc f166f8bd8818 src/mem/ruby/common/Debug.hh f166f8bd8818 src/mem/ruby/common/Debug.cc f166f8bd8818 src/mem/ruby/common/NetDest.hh f166f8bd8818 src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc f166f8bd8818 src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc f166f8bd8818 src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc f166f8bd8818 src/mem/ruby/network/garnet/flexible-pipeline/Router.cc f166f8bd8818 src/mem/ruby/network/simple/PerfectSwitch.cc f166f8bd8818 src/mem/ruby/network/simple/Throttle.cc f166f8bd8818 src/mem/ruby/network/simple/Topology.cc f166f8bd8818 src/mem/ruby/storebuffer/storebuffer.cc f166f8bd8818 src/mem/ruby/system/CacheMemory.cc f166f8bd8818 src/mem/ruby/system/DirectoryMemory.cc f166f8bd8818 src/mem/ruby/system/SConscript f166f8bd8818 src/mem/ruby/system/SparseMemory.cc f166f8bd8818 src/mem/ruby/tester/RaceyPseudoThread.cc f166f8bd8818 src/mem/slicc/ast/FuncCallExprAST.py f166f8bd8818 src/mem/slicc/symbols/StateMachine.py f166f8bd8818 Diff: http://reviews.m5sim.org/r/277/diff Testing ------- Thanks, Nilay _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
