Hi, I am new to Gem5. Please let me know how to enable L3 and confirm that it is working. I am using ALPHA architecture available in gem5 without any modification and using se.py configuration file as available.
On Thu, Dec 6, 2012 at 4:20 AM, Nilay Vaish <[email protected]> wrote: > On Thu, 6 Dec 2012, Abhishek Deshpande wrote: > > Hello, >> >> I am trying to find trace for Last Level Cache or L3, as I want to find >> Read and Writes Hits, Misses to LLC/L3. >> >> Using my current argument, I am able to find trace log for L1 and L2 >> cache. But, though I have L3 cache sizes defined, I am not getting data >> for >> LLC in generated trace file. I can find L1 and L2 data. >> >> >> My current Command Line Argument: >> >> ./build/ALPHA_ES/gem5.opt --quiet --outdir=result >> --trace-file=trace_radix.out --debug-flags=Cache configs/example/se.py >> --clock=2.0GHz --cpu-type=detailed --caches --l1d_size=32kB >> --l1i_size=32kB >> --l1d_assoc=8 --l1i_assoc=4 --l2cache --l2_size=256kB --l2_assoc=8 >> --l3_size=8192kB --l3_assoc=16 -c >> v1-splash-alpha/splash2/codes/**kernels/radix/RADIX >> >> > Can you confirm that an L3 cache is present in the simulated system? > > -- > Nilay >
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