Hi
I figured out that these printed values are most probably fake values not
describing the real initialized system, check the function "doCpuid" in file
"GEM5/gem5-stable/src/arch/x86/cpuid.cc". I believe this function is the GEM5
replacement for cpuid instruction, I could find this :
case L1CacheAndTLB:
result = CpuidResult(0xff08ff08, 0xff20ff20,
0x40020140, 0x40020140);
break;
case L2L3CacheAndL2TLB:
result = CpuidResult(0x00000000, 0x42004200,
0x00000000, 0x04008140);
taking into consideration the definition of "CpuidResult" in file "cpuid.hh"
CpuidResult(uint64_t _rax, uint64_t _rbx,
uint64_t _rdx, uint64_t _rcx) :
rax(_rax), rbx(_rbx), rcx(_rcx), rdx(_rdx)
{}
this shows that both L1I and L1D will always be printed to be of size 40h =
64K and line size = 40h=64. For L2 cache 0x04008140 >> 16 = 0x0400 = 1024K as
printed.
Is my conclusion right ??
Regards
Mostafa
According to this
link:http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html
the cpuid instruction
> Date: Tue, 8 Jan 2013 11:10:55 -0600
> From: [email protected]
> To: [email protected]
> CC: [email protected]
> Subject: RE: [gem5-users] X86 FS + ruby command line options are ignored
>
> On Tue, 8 Jan 2013, Mostafa Mahmoud Hassan wrote:
>
> >
> >
> >
> > I found that the kernel gets these values in this function (exists in
> > linux-2.6.28.4/arch/x86/kernel/cpu/common.c):
> >
> > void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
> > {
> > unsigned int n, dummy, ebx, ecx, edx, l2size;
> >
> > n = c->extended_cpuid_level;
> >
> > if (n >= 0x80000005) {
> > cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
> > printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK
> > (%d bytes/line)\n",
> > edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
> > c->x86_cache_size = (ecx>>24) + (edx>>24);
> >
> > the call to cpuid is responsible for getting edx and ecx , this call
> > ultimatley executes asm code exists in native_cpuid function in
> > "linux-2.6.28.4/arch/x86/include/asm/processor.h"
> >
> > static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
> > unsigned int *ecx, unsigned int *edx)
> > {
> > /* ecx is often an input as well as an output. */
> > asm("cpuid"
> > : "=a" (*eax),
> > "=b" (*ebx),
> > "=c" (*ecx),
> > "=d" (*edx)
> > : "0" (*eax), "2" (*ecx));
> > }
> >
> > but it seems that the asm code is calling cpuid again !
> >
>
> cpuid is an x86 instruction. Read about the info returned by cpuid and
> figure out how gem5 implements this instruction. That should provide
> answer to your original question.
>
> --
> Nilay
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