I was wondering if the issues discussed here were ever addressed - from "Accuracy evaluation of GEM5 simulator system"
"According to the results, the accuracy varies from 1.39% to 17.94% depending on the memory traffic. In the worst scenario, mismatch has been shown to result from overly simple model of the external DDR memory in GEM5 that does not fairly model DRAM specifics." "This originates from a somewhat inaccurate model of the external DDR memory for which GEM5 models latency for each access and an optional random spread factor, therefore abstracting actual DDR complex access patterns." Or is there any way to account for this mismatch? Thank you, Gabriel
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