Hello,

in my config.ini file, I am having this:

icache_port=system.cpu.icache.cpu_side
second_icache_port=system.secondmainCpu.icache.second_cpu_side

I have made some modificiations in order to have two ports in my cpus and in my 
caches.

But then in my code, for example when I have this:

MasterPort::sendTimingReq(PacketPtr pkt)
{
...
    DPRINTF(MyFlag, "return value port name %s\n",_slavePort->name());
...

}

I see this output:

system.mainCpu.icache_port: return value port name system.cpu.icache.cpu_side 
which is correct.
But for the second_icache_port i see this:
system.mainCpu.second_icache_port: return value port name 
system.secondmainCpu.icache.cpu_side

I think at somewhere, I should define what the slave port is going to be,  but 
I do not know where to do that. I have checked for my secondCPU as well and the 
same things happen. Although it appears correctly in the config.ini file, it 
does not return what it supposes to return. Instead it returns the same slave 
port as the icache_port.

Any help?


Edit:
 
For example, in the BaseCPU::takeOverFrom, in the base.cc file,If I call these:

BaseSlavePort &inst_peer_port = oldCPU->getInstPort().getSlavePort();
BaseSlavePort &second_inst_peer_port = 
oldCPU->getSecondInstPort().getSlavePort();

they will return the same although:

oldCPU->getInstPort()  is icache_port
oldCPU->getSecondInstPort()  is second_icache_port

They will both return 

system.cpu.icache.cpu_side as their slave port.

regards,
Ignatios
                                          
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to