Hi, load instruction is written back to memory?? Write back to register?
The load instruction need not to be committed. The add instruction can start to execute as long as the data of the load instruction is available. Zhiguo From: gem5-users [mailto:[email protected]] On Behalf Of Vanchinathan Venkataramani via gem5-users Sent: Wednesday, December 10, 2014 2:14 PM To: gem5 users mailing list Subject: [gem5-users] Waking up instructions dependent on load Hi I am working with ARM SE mode. Suppose we have: ldr r4,[r2,#8] add r1 r4,r1 It looks to me that the dependent add instruction is woken up only after load instruction is written back to memory. Also write back of load instruction happens after commit. I would like to know if this is correct. Thanks
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