Dear All, I am trying to make Gem5 work with the DVFS as explained in the website. While running in Atomic Simple it is working as intended but when I change the cpu type to arm_detailed the simulation crushes during boot. The message that is shown is the following:
gem5.opt: build/ARM/mem/cache/cache_impl.hh:633: bool Cache<TagStore>::recvTimingReq(PacketPtr) [with TagStore = LRU; PacketPtr = Packet*]: Assertion `!pkt->req->isUncacheable()' failed. Has anyone actually ever booted the DVFS enabled kernel that is proposed in the website with arm_detailed cpu type or is it not supported? Sincerely, Giorgos Kopanas
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