Hi

I would suggest you to look at previous posts. Some of the related ones are:

http://comments.gmane.org/gmane.comp.emulators.m5.users/16590
https://www.mail-archive.com/[email protected]/msg02781.html
https://www.mail-archive.com/[email protected]/msg08121.html
ᐧ

On Mon, Jul 20, 2015 at 10:03 PM, rahul shrivastava <[email protected]
> wrote:

> Does anyone has some idea about this?
> I am stuck here for quite a while.
>
>
> Regards
> Rahul
>
> On Mon, Jul 20, 2015 at 6:35 PM, rahul shrivastava <
> [email protected]> wrote:
>
>> Hi,
>>
>> I am using the following command to test multi level caches for ARM FS
>> simulation
>>
>> M5_PATH=$(pwd)/.. ./build/ARM/gem5.fast configs/example/fs.py
>> --script=./auto_scripts --cpu-type=DerivO3CPU -n 4* --caches
>> --l1d_size=32kB --l1i_size=32kB --l2cache --l2_size=256kB --l3_size=20480kB*
>> --machine-type=VExpress_EMM --kernel=../linux-linaro-tracking-gem5/vmlinux
>> --dtb-filename=../linux-linaro-tracking-gem5/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5_dvfs_per_core_4cpus.dtb
>> --disk-image=../disks/arm-ubuntu-natty-headless.img --cpu-clock=\['1
>> GHz','750 MHz','500 MHz'\]
>>
>> But it throws a following exception. Could you please let me know if I am
>> missing some option?
>>
>>
>> *TRACEBACK*
>>
>>   File "<string>", line 1, in <module>
>>
>>   File
>> "/home/rahuls/gem5-stable-0e86fac7254c/gem5/src/python/m5/main.py", line
>> 388, in main
>>
>>     exec filecode in scope
>>
>>   File "configs/example/fs.py", line 335, in <module>
>>
>>     test_sys = build_test_system(np)
>>
>>   File "configs/example/fs.py", line 231, in build_test_system
>>
>>     CacheConfig.config_cache(options, test_sys)
>>
>>   File
>> "/home/rahuls/gem5-stable-0e86fac7254c/gem5/configs/common/CacheConfig.py",
>> line 72, in config_cache
>>
>>     assoc=options.l2_assoc)
>>
>>   File
>> "/home/rahuls/gem5-stable-0e86fac7254c/gem5/src/python/m5/SimObject.py",
>> line 1044, in __init__
>>
>>     setattr(self, key, val)
>>
>>   File
>> "/home/rahuls/gem5-stable-0e86fac7254c/gem5/src/python/m5/SimObject.py",
>> line 1122, in __setattr__
>>
>>     value = param.convert(value)
>>
>>   File
>> "/home/rahuls/gem5-stable-0e86fac7254c/gem5/src/python/m5/params.py", line
>> 212, in convert
>>
>>     return self.ptype(value)
>>
>> TypeError: __init__() takes exactly 1 argument (2 given)
>>
>> Error setting param L2Cache.clk_domain to
>> [<m5.objects.ClockDomain.SrcClockDomain object at 0x7f2b106ed1d0>,
>> <m5.objects.ClockDomain.SrcClockDomain object at 0x7f2b106ed310>,
>> <m5.objects.ClockDomain.SrcClockDomain object at 0x7f2b106ed4d0>,
>> <m5.objects.ClockDomain.SrcClockDomain object at 0x7f2b106ed690>]
>>
>>
>>
>>
>> Regards
>>
>> Rahul
>>
>
>
> _______________________________________________
> gem5-users mailing list
> [email protected]
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>



-- 
Have a great day!

Thanks and Warm Regards
Davesh Shingari
Master's in Computer Engineering [EE]
Arizona State University

[email protected]
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to