Thanks Sharjeel, So, does each core have its own 1GB memory in your configuration?
Would you please briefly explain your system configuration? On Fri, Dec 1, 2017 at 1:34 PM, SHARJEEL KHILJI < [email protected]> wrote: > Hi, > > I have simulated ARM NoC (4 and 8 cores) with 4 and 8GB with > VEXPRESS_GEM5_V1 platform. You can try with this platform. > > regards, > Sharjeel > > > > On 1 December 2017 at 23:55, David Kim <[email protected]> wrote: > >> Hello, >> >> I am going to simulate a system with large memory capacity. >> >> As far as I know, the current gem5 ARM platform can support up to 2GB >> memory (VExpress_EMM machine). >> I thought this limitation is a bit related to VExpress target board >> configuration. So I am trying to manipulate dtb file to increase memory >> capacity of a simulated system. >> >> Is it a right (or reasonable) way to make memory size bigger? Does kernel >> also need to be re-compiled to support >2GB memory? >> >> Can anyone teach me what the actual limiting factor of memory size in >> gem5 ARM configuration is, and how to resolve it? >> >> Thanks. >> >> Dong-Wan Kim >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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