Thanks, Sharjeel. I will try to run ARM NoC with your configuration. FYI, I've modified .dts file, and then generated .dtb file that supports larger memory capacity. I did not fully test it, but it looks like working.
Thanks again. Regards, Dong Wan Kim On Tue, Dec 12, 2017 at 2:38 AM, SHARJEEL KHILJI < [email protected]> wrote: > Hi David, > > I am sorry for late response. Here is the configuration I used to simulate > my NoC > > ./build/ARM/gem5.fast configs/example/fs.py --l1d_size=32kB > --l1i_size=32kB --num-l2caches 4 --l2_size=1MB --cacheline_size=64 > --machine-type=VExpress_GEM5_V1 --kernel > /home/khilji/gem5/m5/system/binaries/vmlinux-aarch32 > --disk-image /home/khilji/gem5/m5/system/disks/arm-ubuntu-natty-headless.img > --dtb-filename /home/khilji/gem5/m5/system/dtb/armv7_gem5_v1_4cpu.dtb > --num-cpus=4 --ruby --num-dirs=4 --network=garnet2.0 --topology Mesh_XY > --mesh-rows 2 --mem-size 1GB --cpu-clock 1GHz --work-begin-exit-count=1 > --work-end-exit-count=1 > > This is the configuration of 2x2 NoC. Each core has 1GB of memory (DRAM). > Total size of memory 4GB. > regards, > > Sharjeel > On 2 December 2017 at 02:10, David Kim <[email protected]> wrote: > >> Thanks Sharjeel, >> >> So, does each core have its own 1GB memory in your configuration? >> >> Would you please briefly explain your system configuration? >> >> >> On Fri, Dec 1, 2017 at 1:34 PM, SHARJEEL KHILJI < >> [email protected]> wrote: >> >>> Hi, >>> >>> I have simulated ARM NoC (4 and 8 cores) with 4 and 8GB with >>> VEXPRESS_GEM5_V1 platform. You can try with this platform. >>> >>> regards, >>> Sharjeel >>> >>> >>> >>> On 1 December 2017 at 23:55, David Kim <[email protected]> wrote: >>> >>>> Hello, >>>> >>>> I am going to simulate a system with large memory capacity. >>>> >>>> As far as I know, the current gem5 ARM platform can support up to 2GB >>>> memory (VExpress_EMM machine). >>>> I thought this limitation is a bit related to VExpress target board >>>> configuration. So I am trying to manipulate dtb file to increase memory >>>> capacity of a simulated system. >>>> >>>> Is it a right (or reasonable) way to make memory size bigger? Does >>>> kernel also need to be re-compiled to support >2GB memory? >>>> >>>> Can anyone teach me what the actual limiting factor of memory size in >>>> gem5 ARM configuration is, and how to resolve it? >>>> >>>> Thanks. >>>> >>>> Dong-Wan Kim >>>> >>>> _______________________________________________ >>>> gem5-users mailing list >>>> [email protected] >>>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>>> >>> >>> >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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