Helllo.
I encounter the following problem when I try to simulate the starter_fs.py in 
aarch64.
Following these following posts 
https://www.mail-archive.com/gem5-users@gem5.org/msg18401.html & 
https://stackoverflow.com/questions/63988672/using-perf-event-with-the-arm-pmu-inside-gem5
I did the steps to apply the patch and changes  and also instantiate the pmus. 
I write a script in the image to access directly the registers.
I manage to read all the events except the cycle counter which always return 0. 
I try to read the cycle counter by instantiating a pmu event counter with 0x11 
but as reading from the ccnt it didn't work as well.
How GEM5 increments this counter. Are the steps to read it the same as in a 
real platform or the simulator has a mismatch configuration?
Also the values obtained reading the counters are not exactly the same as the 
m5 resetstats - m5 dumpstats. I guess maybe these two are syscalls as I read .
Another question is how to add the other events that are not implemented. I 
tried to do the following in the ArmPMU.py but it didn't work despite seeing 
the events created in the console they return 0 values.
self.addEvent(ProbeEvent(self,0x01,icache,"L1I_CACHE_REFILL"))

self.addEvent(ProbeEvent(self,0x0D, bpred, "BR_IMMED_RETIRED"))

Probably you need to add some counters in the component? Or are the implemented 
and I do sth wrong?

Really want some guidance.
Thank you









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Nikolaos Foivos POLYCHRONOU
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