On Sat, Sep 23, 2006 at 12:08:25AM +0200, Moti Litochevski wrote:
> Hi,
> I'm new to GHDL and as many of the first time users not everything is
> working smoothly.
> 
> I'm trying to simulate a VHDL core that was previously tested using a
> different simulator. The design compiles and elaborates with no errors. By
> the way, I'm using GHDL on Windows.
> 
> When I try to run the unit the simulation just finishes without displaying
> anything.
> The VCD file I requested and an output file of the simulation where both
> generated but both with 0 length. I added a print to the screen in the first
> line of the main test bench control process but it did not execute.
> 
> Adding the --stop-time=100us also did not change anything.
> 
> I tried running the hello world example from the manual and it works fine
> (so its not my installation).
> 
> Would appreciate any help,
Hi,

it is not easy to say anything without more details.

You should try to run your design with the --disp-tree option.  This prints
the hierarchy.  Check if it is not too short.

Tristan.

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