2011/2/17 <[email protected]>: > On Thu, 17 Feb 2011 21:31:12 +0100, Jens Henrik Skuldbøl > <[email protected]> wrote: >> >> Hi, >> >> I'm new to GHDL, and VHDL in general, and I've run into a bit of a >> problem. >> I've written a small 1-bit comparator, that, with 1 and 1 as input, >> outputs 0 when compiled with GHDL. I've run a simulation in ModelSim, >> which produces the correct input, and the sourcecode is from a >> textbook, so that should be correct as well. >> >> I've simulated using the tutorial at >> http://mbmn.net/uer/tutorials/vhdl-with-ghdl/. I've also tried using >> the -a and -e commands instead of -i and -m, but with no luck. >> I'd really prefer using this workflow, instead of having to boot into >> Windows to use the Student Edition of ModelSim, so any help would be >> much appreciated. >> i've pasted the sourcecode for both the circuit and the testbench below. >> >> Thanks. >> > > Hi, > the only disputable thing i see is the absence of output in the testbench > process. > > GHDL will display nothing unless you ask it too. > > use some "report" statements, like "report std_ulogic'image(eq);" > (check the syntax) > I'm using GTKwave to view the ports of the simulation. Every other input than 11 works correctly. I'm running GHDL 0.29 on Debian.
-- Venlig hilsen -Jens Henrik Skuldbøl _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
