Good question.
I'm pretty sure incisive support of VHDL is almost complete, but I have never 
used it.
You can try to run the VHDL test suite but I fear you will spend time to setup 
it for incisive and the results will be difficult to analyze or even not 
interesting at all.

Do you want to know missing features from VHDL or from incisive?

Tristan.

----- Simon Thijs de Feber <st.de.fe...@gmail.com> a écrit :
> I'll need to do a functional comparison between GHDL and Cadence Incisive.
> I just can throw a IP and it's TB at it to do some checks. However this is
> not really an intelligent way to do it.
> 
> How could I approach this ?
> Take the test suite of GHDL and run this in both simulators ?
> 
> best regards
> 
> Simon


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