On Tue, 17 Mar 2009, Szak�ts Viktor wrote:
> > For Harbour speedtst builds use -gc3 and -ko switches. -ko enables some
> > optimizations which breaks some strict Clipper compatibility, f.e.
> > different RT errors on wrong types in math operations but as I can see
> > XPP does not respect Clipper compatibility in much more serious places
> > so we should enable such optimizations also in Harbour.
> I think we should enable -ko for Harbour builds. What do you think?
IMHO it's good idea but we should remember to add
#pragma -ko-
#pragma -ko+
to hbtest in three places - otherwise it will report incompatible
error messages.
> > Can you try to make sth similar for MSVC?
> > For hb_atomic_inc32 we need only:
> > LOCK;
> > INC p;
> >
> > and for hb_atomic_dec32:
> > LOCK;
> > DEC p;
> > SETNE;
> >
> Maybe this code:
> ---
> void hb_atomic_inc32( volatile int * p )
> {
> __asm
> {
> lock inc p
> }
> }
> int hb_atomic_dec32( volatile int * p )
> {
> unsigned char c;
> __asm
> {
> lock dec p
> setne c
> }
> return c == 0;
> }
> ---
> Which results in this ASM:
> _hb_atomic_inc32:
> 00000000: 55 push ebp
> 00000001: 8B EC mov ebp,esp
> 00000003: F0 FF 45 08 lock inc dword ptr [ebp+8]
> 00000007: 5D pop ebp
> 00000008: C3 ret
Good if you can also declare it as inline function then we will have
what we need. We can also try to create macro but I do not know if it
will not create some problems for MSVC like for BCC.
> _hb_atomic_dec32:
> 00000010: 55 push ebp
> 00000011: 8B EC mov ebp,esp
> 00000013: 51 push ecx
> 00000014: F0 FF 4D 08 lock dec dword ptr [ebp+8]
> 00000018: 0F 95 45 FF setne byte ptr [ebp-1]
> 0000001C: 0F B6 45 FF movzx eax,byte ptr [ebp-1]
> 00000020: F7 D8 neg eax
> 00000022: 1B C0 sbb eax,eax
> 00000024: 83 C0 01 add eax,1
> 00000027: 8B E5 mov esp,ebp
> 00000029: 5D pop ebp
> 0000002A: C3 ret
In such version SETE should be used insted of SETNE or simply
return c == 0;
changed to"
return c;
It's also good though here compiler didn't optimize the code
In such case it will be better to change it and not use
memory variable. But I do not know how to set return value
in MSVC. Can it accept code like:
int hb_atomic_dec32( volatile int * p )
{
__asm
{
xor eax, eax
lock dec p
setne
}
}
or maybe it's enough to use some pseudo register variable, f.e.:
int hb_atomic_dec32( volatile int * p )
{
__asm
{
xor eax, eax
lock dec p
setne
}
return _EAX; // or other name which in MSVC refers to EAX register
}
If you can check it then I'll add macros for MSVC and we can see how
it changes to differnce between ST and MT modes for:
T001, T004, T007, T010
in speedtst.prg.
best regards,
Przemek
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