>
> > I think we should enable -ko for Harbour builds. What do you think?
>
> IMHO it's good idea but we should remember to add
> #pragma -ko-
> #pragma -ko+
> to hbtest in three places - otherwise it will report incompatible
> error messages.
I'll add -ko to build, I'm leaving you adding #pragmas
to appropriate places.
> Good if you can also declare it as inline function then we will have
> what we need. We can also try to create macro but I do not know if it
> will not create some problems for MSVC like for BCC.
Update code with inline and setne fix, with optional alternate syntax:
---
void __inline hb_atomic_inc32( volatile int * p )
{
__asm lock inc p
}
int __inline hb_atomic_dec32( volatile int * p )
{
unsigned char c;
__asm xor eax, eax
__asm lock dec p
__asm setne c
return c;
}
void main( void )
{
int a;
hb_atomic_inc32( &a );
hb_atomic_dec32( &a );
}
---
disassembly with default Harbour optimizations turned on:
---
_hb_atomic_inc32:
00000000: F0 FF 44 24 04 lock inc dword ptr [esp+4]
00000005: C3 ret
_hb_atomic_dec32:
00000000: 51 push ecx
00000001: 33 C0 xor eax,eax
00000003: F0 FF 4C 24 08 lock dec dword ptr [esp+8]
00000008: 0F 95 44 24 03 setne byte ptr [esp+3]
0000000D: 0F B6 44 24 03 movzx eax,byte ptr [esp+3]
00000012: 59 pop ecx
00000013: C3 ret
_main:
00000000: 83 EC 0C sub esp,0Ch
00000003: 8D 44 24 04 lea eax,[esp+4]
00000007: 89 44 24 08 mov dword ptr [esp+8],eax
0000000B: F0 FF 44 24 08 lock inc dword ptr [esp+8]
00000010: 8B C8 mov ecx,eax
00000012: 89 4C 24 08 mov dword ptr [esp+8],ecx
00000016: 33 C0 xor eax,eax
00000018: F0 FF 4C 24 08 lock dec dword ptr [esp+8]
0000001D: 0F 95 44 24 03 setne byte ptr [esp+3]
00000022: 83 C4 0C add esp,0Ch
00000025: C3 ret
---
return _EAX; // or other name which in MSVC refers to EAX register
It's not possible in MSVC.
Brgds,
Viktor
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