Hi list,
I am currently writing a Makefile which should work in several projects with
minimal edits.
What I want is that within the Makefile of particular project we find:
SRC_DIRS := Src0 Src1
CPP_FILES := $(foreach SRC_DIR,$(SRC_DIRS),$(shell find $(SRC_DIR) -name
"*.cpp"))
And then a set of implicit rules generated by a foreach command:
$(foreach, SRC_DIR,$(SRC_DIRS),\
$(OBJDIR)/%.o : $(SRC_DIR)/%.cpp\
${Q}${CPP} -o $@ $^\
)
But this doesn't work (of course). Is there a way to do that easily (or not)
in a makefile ?
Thanks.
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