The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main as well.


[EMAIL PROTECTED] (Robert A. Rosenberg) writes:
> There was also the secondary use of the high bit to signal AM24 vs
> AM31 in addresses used for branching to/from subroutines. This
> required replacing BALR with BASR and BR with BSM to do the AM Mode
> Switch.

360/370 24bit psw had ILC/CC and program mask in adjacent byte; BAL/BALR
not only saved the 24bit instruction address but also the next byte of
the PSW (cc, and program mask).

on return, not only could the calling/return address be restored, but
SPM instruction would also be used to restore the program mask ... aka
from principle of ops SPM programming notes:
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/dz9zr003/7.5.113?DT=20040504121320

  1. Bits 34-39 of the general register may have been loaded from the PSW
by execution of BRANCH AND LINK in the 24-bit addressing mode or by
execution of INSERT PROGRAM MASK in either the 24-bit or 31-bit
addressing mode.

  2. SET PROGRAM MASK permits setting of the condition code and the mask
bits in either the problem state or the supervisor state.

  3. The program should take into consideration that the setting of the
program mask can have a significant effect on subsequent execution of
the program. Not only do the four mask bits control whether the
corresponding interruptions occur, but the exponent-underflow and
significance masks also determine the result which is obtained.

... snip ..

BAS/BASR were introduced on 360/67 as part of supporting 32bit virtual
addressing mode.

retrenching to 370 ... not only was 360/67 32bit virtual addressing
dropped ... but also the channel controller for multiprocessor support
... standard 360/67 multiprocessor not only allowed all processors to
address all real storage but also all channels.

standard 360 (and later 370) multiprocessor support only allowed two
processors to address all of the (same) real storage ... but each
processor was limited to only addressing their own, dedicated channels.

some of the 360/67 control registers were also used to "sense" the
switches on the channel controller (which governed the multiprocessor
configuration settings ... not only for channels but also for real
storage) ... these control register definitions were later taken over
for "access registers"

-- 
40+yrs virtualization experience (since Jan68), online at home since Mar70

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