For ESA it's real (not absolute) addresses 0-511; for Z architecture the firs 
512 bytes of the second page fram are also protected.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Discussion List [[email protected]] on behalf of 
Charles Mills [[email protected]]
Sent: Tuesday, February 22, 2022 1:20 PM
To: [email protected]
Subject: Re: 2.5 Heads Up

Right ...

Is there a control register bit or something like that for authority to
store in the PSA (+ Key 0 of course).

Charles


-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On
Behalf Of Lennie Dymoke-Bradshaw
Sent: Tuesday, February 22, 2022 9:26 AM
To: [email protected]
Subject: Re: 2.5 Heads Up

There will be multiple versions of that address for PSA for each active
processor in the LPAR.
I don't think that KEY 0 is adequate authority to store there either. Could
be done from a hardware console though.

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