I've been writing up some performance stuff, so this is very topical. An instruction like L 4,=F'99' requires a "lot" of work for the =F'99' eg calculate the virtual address, convert to real page, get the storage.
The Load Immediate R4 with =F'99' the value is in the instruction it has to do none of the above work, and so faster. Colin Colin On Wed, 16 Apr 2025 at 17:21, Charles Mills <[email protected]> wrote: > If you Google <why processors not getting faster> you will see Reddit and > Quora threads going back to about 2010 covering just this topic. I was > going to post a link or two but no one article is perfect. They are all > oriented (of course!) toward the Intel 486/Pentium/etc. family but chips is > chips, more or less. The same physics applies. So if you wish, do your own > Googling. > > The detail reasons have been posted by others. Fast cycle time = more > power = more heat = big problem on a small piece of real estate. Size > (length of electrical signal), heat dissipation and cycle speed work > against each other. > > Processors actually HAVE been getting faster. The chips are getting faster > not in terms of cycle speed but rather in terms of greater parallelism and > new instructions that do more in a single cycle. Same for Intel, by the way. > > The "new instructions" part is why IBM puts so much emphasis on > recompiling (or re-sort-of-compiling with the COBOL ABO) existing COBOL > applications. > > The various "do X on condition" instructions (where X is load, store, > etc.) that came along a couple of arch levels ago are a great example. They > replace (if you code them in HLASM, or let a compiler generate them) the > classic compare/branch/load or store sequence. Branches are a parallelism > killer because they make the chip consider two different paths. Conditional > instructions are not. The vector instructions are a great example of single > instructions that do more with their cycles than their predecessors did. > > Charles > > On Wed, 16 Apr 2025 08:29:43 -0500, Steve Beaver <[email protected]> > wrote: > > >What I am disappointed in is the CP's have not gone faster than 5.5 Ghz. > > > >I know the z17 is an evolution, but why have they not gotten faster? > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
