On Wed, 16 Apr 2025 11:11:00 -0500, Charles Mills wrote: > >The detail reasons have been posted by others. Fast cycle time = more power = >more heat = big problem on a small piece of real estate. Size (length of >electrical signal), heat dissipation and cycle speed work against each other. > The Intel processors reduce power during wait. I know; I have one. When it's busy the chassis gets hot and the fan turns on. Long ago I learned here that IBM processors never reduce power. Is that still true?
>The various "do X on condition" instructions (where X is load, store, etc.) >that came along a couple of arch levels ago are a great example. They replace >(if you code them in HLASM, or let a compiler generate them) the classic >compare/branch/load or store sequence. Branches are a parallelism killer >because they make the chip consider two different paths. Conditional >instructions are not. The vector instructions are a great example of single >instructions that do more with their cycles than their predecessors did. > Do the more complex processors still incur an energy cost for speculative execution? -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
