On Fri, Jan 24, 2014 at 4:58 PM, Ed Jaffe <[email protected]>wrote:
> On 1/21/2014 5:24 PM, Jim Mulder wrote: > >> >> From a hardware design engineer: >> <quote> >> All hardware instructions perform at the same speed in 64-bit mode or >> 31-bit mode. I assume the AMODE(31) and AMODE(64) he is referring to >> only affects the addressing mode, but the exact same instruction >> sequences are used in both cases. If different code sequences are being >> used, then all bets are off. My first statement applies to the >> exact same code sequence in 64-bit addressing mode versus 31-bit >> addressing mode. A few millicoded instructions do have slightly >> different path lengths depending on addressing mode, but even that >> is not common. >> <endquote> >> > > Perhaps JG's assertion is actually about "grande" instructions vs "normal" > instructions. Our benchmarks show grande instructions are ever-so-slightly > (<2%) slower than their non-grande counterparts. Example: L vs LG. > > Of course, the instruction path for the six-byte grande "LG" benchmark > code is 50% larger (in terms of space occupied, not instructions issued) > than its four-byte non-grande "L" counterpart, meaning more i-cache is > required to run it. So, perhaps that is to what this <2% difference is > attributable. > > Either way, it's something we consistently observe... > > -- > Edward E Jaffe > > In cases like this, it might be helpful to know the _exact_ machine you're running on, or if this is one a number of different machine types. z9BC, z9EC, z10BC, z10EC, and so on. -- Wasn't there something about a PASCAL programmer knowing the value of everything and the Wirth of nothing? Maranatha! <>< John McKown ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
