On Mon, 7 May 2018 13:18:51 -0500, Tom Marchant <[email protected]> wrote:
>>The IARV64 instruction probably will find >>memory. But it will be a 64-bit address >>requiring me to manipulate and save >>64-bit registers. > You chose to ignore Jim Mulder's reply. Replied now. >>How do you distinguish between applications >>that only use the S/370 32-bit registers and >>applications that use the z/Arch 64-bit >>registers, > >Are you suggesting that a 24-bit application, one that runs AMODE(24), >only uses 24-bit registers? You are not making any sense. No, what you are calling a 24-bit application is actually a 32-bit application that runs on a reduced addressing mode of 24. >>64-bit >>applications have no chance of running on >>MVS 3.8j on S/370 hardware. > >Nor do 31-bit applications. Yes they do if they are bimodal (ANY/ANY). All I am doing is upping the stakes to trimodal. >>strip >>the high bit with an N to x'7FFFFFFF' > LLGT/LLGTR I want my programs to run on S/370 hardware too, so the "N" is required. BFN. Paul. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
