On Tue, 2 Nov 2010 17:08:09 +0800, "Zou, Nanhai" <[email protected]> wrote: > >>-----Original Message----- > >>From: Chris Wilson [mailto:[email protected]] > >>Sent: 2010å¹´11æ2æ¥ 17:05 > >>To: Zou, Nanhai; [email protected] > >>Cc: Zou, Nanhai > >>Subject: Re: [PATCH] drm/i915: SNB BLT workaround > >> > >>On Tue, 2 Nov 2010 16:31:01 +0800, Zou Nan hai <[email protected]> > >>wrote: > >>> on some stepping of SNB cpu, the first command to be parsed in BLT > >>> command streamer should be MI_BATCHBUFFER_START > >>> otherwise the GPU may hang. > >> > >>Then just add the workaround to the init routine. > >>-Chris > >> > > The first command here means each BLT command streamer > begin the parse action, when the ring tail is moving ahead.
Okay, that makes more sense. :) I added some error checking, then realised that no error checking was done in 2.6.36 and swore. Applied to -next and -fixes, with a tag for stable since I presume that some of these chips were sent to vendors for validation. -Chris -- Chris Wilson, Intel Open Source Technology Centre
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