On Fri,  6 May 2011 14:03:31 -0700
Eric Anholt <[email protected]> wrote:

> This is once less place to miss a new INTEL_INFO(dev)->gen update now.
> 
> Signed-off-by: Eric Anholt <[email protected]>
> ---
>  drivers/gpu/drm/i915/i915_gem.c |   21 +++------------------
>  1 files changed, 3 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index bf32527..4304f74 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3856,25 +3856,10 @@ i915_gem_load(struct drm_device *dev)
>               dev_priv->num_fence_regs = 8;
>  
>       /* Initialize fence registers to zero */
> -     switch (INTEL_INFO(dev)->gen) {
> -     case 6:
> -             for (i = 0; i < 16; i++)
> -                     I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + (i * 8), 0);
> -             break;
> -     case 5:
> -     case 4:
> -             for (i = 0; i < 16; i++)
> -                     I915_WRITE64(FENCE_REG_965_0 + (i * 8), 0);
> -             break;
> -     case 3:
> -             if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
> -                     for (i = 0; i < 8; i++)
> -                             I915_WRITE(FENCE_REG_945_8 + (i * 4), 0);
> -     case 2:
> -             for (i = 0; i < 8; i++)
> -                     I915_WRITE(FENCE_REG_830_0 + (i * 4), 0);
> -             break;
> +     for (i = 0; i < dev_priv->num_fence_regs; i++) {
> +             i915_gem_clear_fence_reg(dev, &dev_priv->fence_regs[i]);
>       }
> +
>       i915_gem_detect_bit_6_swizzle(dev);
>       init_waitqueue_head(&dev_priv->pending_flip_queue);
>  

Aside from the extra curly braces:

Reviewed-by: Jesse Barnes <[email protected]>

-- 
Jesse Barnes, Intel Open Source Technology Center
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