On Fri, 6 May 2011 14:03:32 -0700 Eric Anholt <[email protected]> wrote:
> The registers are the same as on Sandybridge. Fixes scrambled display > in X when it does software drawing to the GTT, and scans the results > out as tiled. > > Signed-off-by: Eric Anholt <[email protected]> > --- > drivers/gpu/drm/i915/i915_gem.c | 2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 4304f74..c628903 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2673,6 +2673,7 @@ i915_gem_object_get_fence(struct drm_i915_gem_object > *obj, > update: > obj->tiling_changed = false; > switch (INTEL_INFO(dev)->gen) { > + case 7: > case 6: > ret = sandybridge_write_fence_reg(obj, pipelined); > break; > @@ -2706,6 +2707,7 @@ i915_gem_clear_fence_reg(struct drm_device *dev, > uint32_t fence_reg = reg - dev_priv->fence_regs; > > switch (INTEL_INFO(dev)->gen) { > + case 7: > case 6: > I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + fence_reg*8, 0); > break; Yep, definitely needed. I'll factor out the tiled stuff I added to testdisplay (for testing video sprites) so we can catch this stuff more easily. Reviewed-by: Jesse Barnes <[email protected]> -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
