On 10/30/11 12:24 AM, Keith Packard wrote:
On Sat, 29 Oct 2011 00:05:22 -0700, "Keith Packard"<[email protected]> wrote:
* I've got LVDS pulling the current mode out of the hardware
With a machine that has a native VBE mode for the panel, the problem is
that clock computed from the hardware settings is not quite the same as
the clock requested in the mode. I think the clock computation must be
slightly off, but even with that fixed, it will probably not quite
match. I think we'll need a magic flag in this mode telling DRM to allow
a bit of fuzz in clock matching.
Yeah, it won't be precise. That's why there's PLL search code at all,
and why it has a fuzz factor for finding "good enough".
I ran the math for the maximum error in the PLL search back when I was
fixing a case where it fell through and failed to find timings at all.
See 6ba770dc5c334aff1c055c8728d34656e0f091e2.
- ajax
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