On Thu, 3 Nov 2011 15:41:25 -0700, Jesse Barnes <jbar...@virtuousgeek.org> wrote:
> Except for VDD?? That does come on... and shouldn't be any different > than a full power sequence as far as link training etc go... Oh, that's a good point. Doing things in this order essentially forces yet another full panel power sequence delay at this point. Hrm. I'll have to test again when I get a chance, but perhaps we can turn the sink DPMS on before we turn the panel power off. > Oh missed the vdd on, which is in this path too... So I'm still > confused by the panel off, vdd on sequence, but at least they're > consistent. Right, I'll try doing the sink_dpms before turning the panel off; that should work just fine, and should make the sequence a bit faster. -- keith.pack...@intel.com
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