On Wed, 2 May 2012 13:14:59 -0700, Ben Widawsky <[email protected]> wrote: > On Wed, 2 May 2012 20:43:56 +0100 > Chris Wilson <[email protected]> wrote:
When initialising the PLL registers we may have to clear existing state from the BIOS - that is the PLL may already be enabled. So we need to disable it, wait for the clocks to settle and then rewrite it. The issue came to light when Ben tested commit 88ca4bb7974277793e602d88739d4e8f56b89e64 Author: Jesse Barnes <[email protected]> Date: Fri Apr 20 17:11:53 2012 +0100 drm/i915: manage PCH PLLs separately from pipes and found that booting into a VGA monitor was no longer working. Closer inspection suggests that it was a pre-existing bug now being hit by the rearranged code. Perhaps Ben was not even the first person to stumble upon this bug, https://bugs.freedesktop.org/show_bug.cgi?id=37029. Signed-off-by: Chris Wilson <[email protected]> > > Cc: Ben Widawsky <[email protected]> > > Cc: Jesse Barnes <[email protected]> > Reported-and-tested-by: Ben Widawsky <[email protected]> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
