On Fri, Dec 23, 2016 at 03:56:22PM -0800, [email protected] wrote: > From: Daniele Ceraolo Spurio <[email protected]> > > The context has to obey the same offset requirements as the ring, > so we can re-use the same bias value we computed for the ring instead of > unconditionally using GUC_WOPCM_TOP. > > Suggested-by: Chris Wilson <[email protected]> > Signed-off-by: Daniele Ceraolo Spurio <[email protected]> > Cc: Chris Wilson <[email protected]>
Both Reviewed-by: Chris Wilson <[email protected]> Applied and pushed. Thanks for digging in to find the root cause. We could relax the 4096 offset for bdw+ I think, or maybe only gen6/gen7 had enough coverage in the wild to hit the hole. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
