Now that the kselftest infrastructure exists, put it to use and add to
it the existing consistency checks on the fw register lookup tables.

v2: s/tabke/table/

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Reviewed-by: Matthew Auld <matthew.a...@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c                | 52 +-----------
 .../gpu/drm/i915/selftests/i915_live_selftests.h   |  1 +
 drivers/gpu/drm/i915/selftests/intel_uncore.c      | 99 ++++++++++++++++++++++
 3 files changed, 104 insertions(+), 48 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/selftests/intel_uncore.c

diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index abe08885a5ba..b6ce8de2cc86 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -635,33 +635,6 @@ find_fw_domain(struct drm_i915_private *dev_priv, u32 
offset)
        return entry->domains;
 }
 
-static void
-intel_fw_table_check(struct drm_i915_private *dev_priv)
-{
-       const struct intel_forcewake_range *ranges;
-       unsigned int num_ranges;
-       s32 prev;
-       unsigned int i;
-
-       if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
-               return;
-
-       ranges = dev_priv->uncore.fw_domains_table;
-       if (!ranges)
-               return;
-
-       num_ranges = dev_priv->uncore.fw_domains_table_entries;
-
-       for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
-               WARN_ON_ONCE(IS_GEN9(dev_priv) &&
-                            (prev + 1) != (s32)ranges->start);
-               WARN_ON_ONCE(prev >= (s32)ranges->start);
-               prev = ranges->start;
-               WARN_ON_ONCE(prev >= (s32)ranges->end);
-               prev = ranges->end;
-       }
-}
-
 #define GEN_FW_RANGE(s, e, d) \
        { .start = (s), .end = (e), .domains = (d) }
 
@@ -700,23 +673,6 @@ static const i915_reg_t gen8_shadowed_regs[] = {
        /* TODO: Other registers are not yet used */
 };
 
-static void intel_shadow_table_check(void)
-{
-       const i915_reg_t *reg = gen8_shadowed_regs;
-       s32 prev;
-       u32 offset;
-       unsigned int i;
-
-       if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG))
-               return;
-
-       for (i = 0, prev = -1; i < ARRAY_SIZE(gen8_shadowed_regs); i++, reg++) {
-               offset = i915_mmio_reg_offset(*reg);
-               WARN_ON_ONCE(prev >= (s32)offset);
-               prev = offset;
-       }
-}
-
 static int mmio_reg_cmp(u32 key, const i915_reg_t *reg)
 {
        u32 offset = i915_mmio_reg_offset(*reg);
@@ -1445,10 +1401,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
                break;
        }
 
-       intel_fw_table_check(dev_priv);
-       if (INTEL_GEN(dev_priv) >= 8)
-               intel_shadow_table_check();
-
        if (intel_vgpu_active(dev_priv)) {
                ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
                ASSIGN_READ_MMIO_VFUNCS(vgpu);
@@ -1971,3 +1923,7 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private 
*dev_priv,
 
        return fw_domains;
 }
+
+#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
+#include "selftests/intel_uncore.c"
+#endif
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h 
b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index fde9ef22cfe8..c060bf24928e 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -9,6 +9,7 @@
  * Tests are executed in order by igt/drv_selftest
  */
 selftest(sanitycheck, i915_live_sanitycheck) /* keep first (igt selfcheck) */
+selftest(uncore, intel_uncore_live_selftests)
 selftest(requests, i915_gem_request_live_selftests)
 selftest(object, i915_gem_object_live_selftests)
 selftest(coherency, i915_gem_coherency_live_selftests)
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c 
b/drivers/gpu/drm/i915/selftests/intel_uncore.c
new file mode 100644
index 000000000000..0ac467940a4f
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "i915_selftest.h"
+
+static int intel_fw_table_check(struct drm_i915_private *i915)
+{
+       const struct intel_forcewake_range *ranges;
+       unsigned int num_ranges, i;
+       s32 prev;
+
+       ranges = i915->uncore.fw_domains_table;
+       if (!ranges)
+               return 0;
+
+       num_ranges = i915->uncore.fw_domains_table_entries;
+       for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
+               /* Check that the table is watertight */
+               if (IS_GEN9(i915) && (prev + 1) != (s32)ranges->start) {
+                       pr_err("%s: entry[%d]:(%x, %x) is not watertight to 
previous (%x)\n",
+                              __func__, i, ranges->start, ranges->end, prev);
+                       return -EINVAL;
+               }
+
+               /* Check that the table never goes backwards */
+               if (prev >= (s32)ranges->start) {
+                       pr_err("%s: entry[%d]:(%x, %x) is less than the 
previous (%x)\n",
+                              __func__, i, ranges->start, ranges->end, prev);
+                       return -EINVAL;
+               }
+
+               /* Check that the entry is valid */
+               if (ranges->start >= ranges->end) {
+                       pr_err("%s: entry[%d]:(%x, %x) has negative length\n",
+                              __func__, i, ranges->start, ranges->end);
+                       return -EINVAL;
+               }
+
+               prev = ranges->end;
+       }
+
+       return 0;
+}
+
+static int intel_shadow_table_check(void)
+{
+       const i915_reg_t *reg = gen8_shadowed_regs;
+       unsigned int i;
+       s32 prev;
+
+       for (i = 0, prev = -1; i < ARRAY_SIZE(gen8_shadowed_regs); i++, reg++) {
+               u32 offset = i915_mmio_reg_offset(*reg);
+               if (prev >= (s32)offset) {
+                       pr_err("%s: entry[%d]:(%x) is before previous (%x)\n",
+                              __func__, i, offset, prev);
+                       return -EINVAL;
+               }
+
+               prev = offset;
+       }
+
+       return 0;
+}
+
+int intel_uncore_live_selftests(struct drm_i915_private *i915)
+{
+       int err;
+
+       err = intel_fw_table_check(i915);
+       if (err)
+               return err;
+
+       err = intel_shadow_table_check();
+       if (err)
+               return err;
+
+       return 0;
+}
-- 
2.11.0

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