If the GT device is already awake, we can skip checking the FIFO for sufficient entires to store the mmio write, as the write will go directly to the device.
Signed-off-by: Chris Wilson <[email protected]> --- drivers/gpu/drm/i915/intel_uncore.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 441c51fd9746..34c2a1551a0d 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1051,13 +1051,11 @@ static void \ gen6_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \ u32 __fifo_ret = 0; \ GEN6_WRITE_HEADER; \ - if (NEEDS_FORCE_WAKE(offset)) { \ + if (NEEDS_FORCE_WAKE(offset) && !dev_priv->uncore.fw_domains_active) \ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \ - } \ __raw_i915_write##x(dev_priv, reg, val); \ - if (unlikely(__fifo_ret)) { \ + if (unlikely(__fifo_ret)) \ gen6_gt_check_fifodbg(dev_priv); \ - } \ GEN6_WRITE_FOOTER; \ } -- 2.11.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
